The Digital Integrated System Architectures course covers advanced aspects of digital VLSI design at circuit level, Register Transfer Level, and microprocessor architecture level. It introduces the effective usage of hardware description languages (mainly VHDL) for FPGA and ASIC design. .
Tuesday 15.30 to 18.30 unless differently announced, at DIET Department, via Eudossiana 18, 4th floor, roo 419. Appointment by email or phone is recommended. Prof. Olivieri – 0644585435 – E-Mail email@example.com
SLIDES and SOURCE CODE EXAMPLES
R. H. Krambeck, C. M. Lee, and H. Law, “High-speed compact circuits with CMOS,” IEEE Journal of Solid-State Circuits, vol. SC-17, pp. 614–619, June 1982. Original article on Domino logic.
David Harris, and Mark A. Horowitz, Skew-Tolerant Domino Circuits, JSSC 1997. download
David Harris, Mark Horowitz, and Dean Liu, Timing Analysis Including Clock Skew, TCAD 1999. download
A prototype 1 GHz PowerPC microprocessor, Special session of three articles on high-clock-speed design techniques.
Thomas D. Burd and Robert W. Brodersen, Energy Efficient CMOS Microprocessor Design, JSSC95 download
Stuart F. Oberman and Michael J. Flynn, Division Algorithms and Implementations, TC97. download